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  devices incorporated special arithmetic functions 08/16/2000Clds.33-o 1 lsh33 32-bit barrel shifter with registers q q q q q 32-bit input, 32-bit output multi- plexed to 16 lines q q q q q full 0-31 position barrel shift capability q q q q q integral priority encoder for 32-bit floating point normalization q q q q q sign-magnitude or twos comple- ment mantissa representation q q q q q 32-bit linear shifts with sign or zero fill q q q q q independent priority encoder outputs for block floating point q q q q q 68-pin plcc, j-lead features description lsh33 32-bit barrel shifter with registers devices incorporated lsh33 b lock d iagram the lsh33 is a 32-bit high speed shifter designed for use in floating point normalization, word pack/ unpack, field extraction, and similar applications. it has 32 data inputs, and 16 output lines. any shift con- figuration of the 32 inputs, including circular (barrel) shifting, left shifts with zero fill, and right shifts with sign extension are possible. in addi- tion, a built-in priority encoder is provided to aid floating point normal- ization. input/output registers provide complete pipelined operation. both have independent bypass paths for complete flexibility. when fti = 1, the input registers are bypassed. likewise, when fto= 1, the output registers are bypassed. shift array the 32 inputs, which can be regis- tered, to the lsh33 are applied to a 32-bit shift array. the 32 outputs, which can also be registered, of this array are then multiplexed down to 16 lines for presentation at the device outputs. the array may be configured such that any contiguous 16-bit field (including wraparound of the 32 inputs) may be presented to the output pins under control of the shift code field (wrap mode). alterna- tively, the wrap feature may be disabled, resulting in zero or sign bit fill, as appropriate (fill mode). the shift code control assignments and the resulting input to output mapping for the wrap mode are shown in table 1. essentially the lsh33 is configured as a left shift device. that is, a shift code of 00000 2 results in no shift of the input field. a code of 00001 2 provides an effective left shift of 1 position, etc. when viewed as a right shift, the shift code corresponds to the twos comple- ment of the shift distance, i.e., a shift code of 11111 2 (C1 10 ) results in a right shift of one position, etc. when not in the wrap mode, the lsh33 fills bit positions for which there is no corresponding input bit. the fill value and the positions filled depend on the right/left (r/l) direction pin. this pin is a dont care input when in wrap mode. for left shifts in fill mode, lower bits are filled with zero as shown in table 2. for right shifts, however, the sign input is used as the fill value. table 3 depicts the bits to be filled as a function of shift code for the right shift case. note that the r/l input changes only the fill convention, and does not affect the definition of the shift code. 16 oe ms/ls 32-bit barrel shift array 16 2:1 32:5 priority encode 32 5 32 sign norm right/left fill/wrap 5 gg 2:1 gg 2:1 2:1 2:1 2:1 eno clk eni clk fto fti g 2:1 5 i 31 -i 0 y 15 -y 0 si/o 4 -si/o 0 16
08/16/2000Clds.33-o 2 special arithmetic functions devices incorporated lsh33 32-bit barrel shifter with registers t able 1. w rap m ode s hift c ode d efinitions shift code shift code shift code shift code shift code y y y y y 31 31 31 31 31 y y y y y 30 30 30 30 30 y y y y y 29 29 29 29 29 ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? y y y y y 16 16 16 16 16 y y y y y 15 15 15 15 15 ? ? ? y y y y y 2 2 2 2 2 y y y y y 1 1 1 1 1 y y y y y 0 0 0 0 0 00000 i 31 i 30 i 29 ? ? ? i 16 i 15 ? ? ? i 2 i 1 i 0 00001 i 30 i 29 i 28 ? ? ? i 15 i 14 ? ? ? i 1 i 0 i 31 00010 i 29 i 28 i 27 ? ? ? i 14 i 13 ? ? ? i 0 i 31 i 30 00011 i 28 i 27 i 26 ? ? ? i 13 i 12 ? ? ? i 31 i 30 i 29 ? ???? ? ?? ?? ? ???? ? ???? ? ?? ?? ? ???? ? ???? ? ?? ?? ? ???? 01111 i 16 i 15 i 14 ? ? ? i 1 i 0? ? ? i 19 i 18 i 17 10000 i 15 i 14 i 13 ? ? ? i 0 i 31 ? ? ? i 18 i 17 i 16 10001 i 14 i 13 i 12 ? ? ? i 31 i 30 ? ? ? i 17 i 16 i 15 10010 i 13 i 12 i 11 ? ? ? i 30 i 29 ? ? ? i 16 i 15 i 14 ? ???? ? ?? ?? ? ???? ? ???? ? ?? ?? ? ???? ? ???? ? ?? ?? ? ???? 11100 i 3 i 2 i 1? ? ? i 20 i 19 ? ? ? i 6 i 5 i 4 11101 i 2 i 1 i 0? ? ? i 19 i 18 ? ? ? i 5 i 4 i 3 11110 i 1 i 0 i 31 ? ? ? i 18 i 17 ? ? ? i 4 i 3 i 2 11111 i 0 i 31 i 30 ? ? ? i 17 i 16 ? ? ? i 3 i 2 i 1 t able 2. f ill m ode s hift c ode d efinitions l eft s hift in fill mode, as in wrap mode, the shift code input represents the number of shift positions directly for left shifts, but the twos complement of the shift code results in the equivalent right shift. however, for fill mode the r/l input can be viewed as the most significant bit of a 6-bit twos comple- ment shift code, comprised of r/l concatenated with the si 4 Csi 0 lines. thus, a positive shift code (r/l = 0) results in a left shift of 0C31 positions, and a negative code (r/l = 1) a right shift of up to 32 positions. the lsh33 can thus effectively select any contigu- ous 32-bit field out of a (sign extended and zero filled) 96-bit "input." output multiplexer the shift array outputs can be regis- tered and then applied to a 2:1 multi- plexer controlled by the ms/ls select line. this multiplexer makes available at the output pins either the most significant or least significant 16 outputs of the shift array. priority encoder the 32-bit input bus drives a priority encoder which is used to determine the first significant position for purposes of normalization. the priority encoder produces a five-bit code representing the location of the first non-zero bit in the input word. code assignment is such that the priority encoder output represents the number of shift positions required to left align the first non-zero bit of the input word. prior to the priority encoder, the input bits are individu- ally exclusive ored with the sign input. this allows normalization in floating point systems using twos complement mantissa representation. a negative value in twos complement representation will cause the exclusive or gates to invert the input data to the encoder. as a result, the leading significant digit will always be "1." shift code shift code shift code shift code shift code y y y y y 31 31 31 31 31 y y y y y 30 30 30 30 30 y y y y y 29 29 29 29 29 ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? y y y y y 16 16 16 16 16 y y y y y 15 15 15 15 15 ? ? ? y y y y y 2 2 2 2 2 y y y y y 1 1 1 1 1 y y y y y 0 0 0 0 0 00000 i 31 i 30 i 29 ? ? ? i 16 i 15 ? ? ? i 2 i 1 i 0 00001 i 30 i 29 i 28 ? ? ? i 15 i 14 ? ? ? i 1 i 0 0 00010 i 29 i 28 i 27 ? ? ? i 14 i 13 ? ? ? i 0 00 00011 i 28 i 27 i 26 ? ? ? i 13 i 12 ? ? ? 000 ? ???? ? ?? ?? ? ???? ? ???? ? ?? ?? ? ???? ? ???? ? ?? ?? ? ???? 01111 i 16 i 15 i 14 ? ? ? i 1 i 0? ? ? 000 10000 i 15 i 14 i 13 ? ? ? i 0 0 ? ? ? 000 10001 i 14 i 13 i 12 ? ? ? 00 ? ? ? 000 10010 i 13 i 12 i 11 ? ? ? 00 ? ? ? 000 ? ???? ? ?? ?? ? ???? ? ???? ? ?? ?? ? ???? ? ???? ? ?? ?? ? ???? 11100 i 3 i 2 i 1? ? ? 00 ? ? ? 000 11101 i 2 i 1 i 0? ? ? 00 ? ? ? 000 11110 i 1 i 0 0 ? ? ? 00 ? ? ? 000 11111 i 0 00 ? ? ? 00 ? ? ? 000
devices incorporated special arithmetic functions 08/16/2000Clds.33-o 3 lsh33 32-bit barrel shifter with registers t able 3. f ill m ode s hift c ode d efinitions r ight s hift t able 4. p riority e ncoder f unction t able i i i i i 31 31 31 31 31 i i i i i 30 30 30 30 30 i i i i i 29 29 29 29 29 ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? i i i i i 16 16 16 16 16 i i i i i 15 15 15 15 15 ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? i i i i i 2 2 2 2 2 i i i i i 1 1 1 1 1 i i i i i 0 0 0 0 0 shift code shift code shift code shift code shift code 1xx ? ? ? xx ? ? ? x x x 00000 01x ? ? ? xx ? ? ? x x x 00001 001 ? ? ? xx ? ? ? x x x 00010 ???? ? ?? ?? ? ???? ? ???? ? ?? ?? ? ???? ? 000 ? ? ? 1x ? ? ? x x x 01111 000 ? ? ? 01 ? ? ? x x x 10000 000 ? ? ? 00 ? ? ? x x x 10001 ???? ? ?? ?? ? ???? ? ???? ? ?? ?? ? ???? ? 000 ? ? ? 00 ? ? ? 0 1 x 11110 000 ? ? ? 00 ? ? ? 0 0 1 11111 000 ? ? ? 00 ? ? ? 0 0 0 11111 this affects only the encoder inputs; the shift array always operates on the raw input data. the priority encoder function table is shown in table 4. normalize multiplexer the norm input, when asserted, results in the priority encoder output driving the internal shift code inputs directly. when using the norm function, the lsh33 should be placed in fill mode, with the r/l input low. when norm is high (not asserted), the si/o 4 Csi/o 0 port acts as the shift code input to the shifter. applications examples normalization of mantissas up to 32 bits can be accomplished directly by a single lsh33. to do this, the norm input is asserted, and fill mode and left shift are selected. the normalized mantissa is then available at the device output in two 16-bit segments, under the control of the output data multiplexer select, the ms/ls signal. if it is desirable to avoid the necessity of multiplexing output data in 16-bit segments, two lsh33 devices can be used in parallel. both devices receive the same input word, with the ms/ls select line of one wired high, and the other low. each device will then independently determine the shift distance required for normalization, and the full 32 bits of output data will be available simultaneously. shift code shift code shift code shift code shift code y y y y y 31 31 31 31 31 y y y y y 30 30 30 30 30 y y y y y 29 29 29 29 29 ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? y y y y y 16 16 16 16 16 y y y y y 15 15 15 15 15 ? ? ? y y y y y 2 2 2 2 2 y y y y y 1 1 1 1 1 y y y y y 0 0 0 0 0 00000 s s s ? ? ? ss ? ? ? sss 00001 s s s ? ? ? ss ? ? ? ssi 31 00010 s s s ? ? ? ss ? ? ? si 31 i 30 00011 s s s ? ? ? ss ? ? ? i 31 i 30 i 29 ? ???? ? ?? ?? ? ???? ? ???? ? ?? ?? ? ???? ? ???? ? ?? ?? ? ???? 01111 s s s ? ? ? ss ? ? ? i 19 i 18 i 17 10000 s s s ? ? ? si 31 ? ? ? i 18 i 17 i 16 10001 s s s ? ? ? i 31 i 30 ? ? ? i 17 i 16 i 15 10010 s s s ? ? ? i 30 i 29 ? ? ? i 16 i 15 i 14 ? ???? ? ?? ?? ? ???? ? ???? ? ?? ?? ? ???? ? ???? ? ?? ?? ? ???? 11100 s s s ? ? ? i 20 i 19 ? ? ? i 6 i 5 i 4 11101 s s s ? ? ? i 19 i 18 ? ? ? i 5 i 4 i 3 11110 s s i 31 ? ? ? i 18 i 17 ? ? ? i 4 i 3 i 2 11111 s i 31 i 30 ? ? ? i 17 i 16 ? ? ? i 3 i 2 i 1
08/16/2000Clds.33-o 4 special arithmetic functions devices incorporated lsh33 32-bit barrel shifter with registers symbol parameter test condition min typ max unit v oh output high voltage v cc = min., i oh = C2.0 ma 2.4 v v ol output low voltage v cc = min., i ol = 8.0 ma 0.4 v v ih input high voltage 2.0 v cc v v il input low voltage (note 3) 0.0 0.8 v i ix input current ground v in v cc (note 12) 20 a i oz output leakage current ground v out v cc (note 12) 20 a i cc1 v cc current, dynamic (notes 5, 6) 10 30 ma i cc2 v cc current, quiescent (note 7) 1.5 ma storage temperature ........................................................................................................... C65c to +150c operating ambient temperature ........................................................................................... C55c to +125c v cc supply voltage with respect to ground ............................................................................ C0.5 v to +7. 0v input signal with respect to ground ........................................................................................ C3. 0 v to +7.0 v signal applied to high impedance output ............................................................................... C3.0 v to +7.0 v output current into low outputs ................................................................................................ ............. 25 ma latchup current ................................................................................................................ ............... > 400 ma m aximum r atings above which useful life may be impaired (notes 1, 2, 3, 8) o perating c onditions to meet specified electrical and switching characteristics e lectrical c haracteristics over operating conditions (note 4) mode temperature range (ambient) supply voltage active operation, commercial 0c to +70c 4.75 v v cc 5.25 v active operation, military C55c to +125c 4.50 v v cc 5.50 v
devices incorporated special arithmetic functions 08/16/2000Clds.33-o 5 lsh33 32-bit barrel shifter with registers 1234567890123 1 23456789012 3 1 23456789012 3 1 23456789012 3 1 23456789012 3 1 23456789012 3 1 23456789012 3 1 23456789012 3 1 23456789012 3 1 23456789012 3 1 23456789012 3 1 23456789012 3 1 23456789012 3 1 23456789012 3 1 23456789012 3 1 23456789012 3 1234567890123 1234567890123 1 23456789012 3 1 23456789012 3 1 23456789012 3 1 23456789012 3 1 23456789012 3 1 23456789012 3 1 23456789012 3 1 23456789012 3 1 23456789012 3 1 23456789012 3 1 23456789012 3 1 23456789012 3 1 23456789012 3 1 23456789012 3 1 23456789012 3 1234567890123 1234567890123 1 23456789012 3 1 23456789012 3 1 23456789012 3 1 23456789012 3 1 23456789012 3 1 23456789012 3 1 23456789012 3 1 23456789012 3 1 23456789012 3 1 23456789012 3 1234567890123 1234567890123 1 23456789012 3 1 23456789012 3 1 23456789012 3 1 23456789012 3 1 23456789012 3 1 23456789012 3 1 23456789012 3 1 23456789012 3 1 23456789012 3 1 23456789012 3 1234567890123 123456789012345678901234567 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 123456789012345678901234567 123456789012345678901234567 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 123456789012345678901234567 123456789012345678901234567 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 123456789012345678901234567 123456789012345678901234567 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 123456789012345678901234567 lsh33-40 * y 15 -y 0 so 4 -so 0 28 28 28 73 / 40 55 / 52 52 28 28 28 28 73 / 40 55 / 52 52 28 switching characteristics c ommercial o perating r ange (0c to +70c) g uaranteed m aximum c ombinational d elays notes 9, 10 (ns) to output from input fti = 0, fto = 0 clk ms/ls fti = 0, fto= 1 clk (norm = 0/1) si 4 -si 0 r/l, f/w ms/ls fti = 1, fto = 0 clk ms/ls fti = 1, fto = 1 i 31 -i 0 , sign (norm = 0/1) si 4 -si 0 r/l, f/w ms/ls lsh33-30 y 15 -y 0 so 4 -so 0 24 24 24 58 / 30 42 / 40 40 24 24 24 24 58 / 30 42 / 40 40 24 lsh33-20 * y 15 -y 0 so 4 -so 0 15 15 15 20 / 20 20 / 20 20 15 15 15 15 20 / 20 20 / 20 20 15 input i 31 -i 0 , sign si 4 -si 0 r/l, f/w eni, eno g uaranteed m inimum s etup and h old t imes w ith r espect to c lock r ising e dge notes 9, 10 (ns) lsh33-30 fti = 0 fti = 1 setup hold setup hold 10 3 15 2 15 0 15 0 10 0 10 0 10 0 10 0 lsh33-20 * fti = 0 fti = 1 setup hold setup hold 80 82 80 80 80 80 80 80 lsh33-40 * fti = 0 fti = 1 setup hold setup hold 12 3 20 2 17 0 17 0 12 0 12 0 12 0 12 0 t ri -s tate e nable /d isable t imes notes 9, 10, 11 (ns) lsh33-40 * lsh33-30 lsh33-20 * 20 17 15 20 17 15 t ena t dis c lock c ycle t ime and p ulse w idth notes 9, 10 (ns) minimum cycle time highgoing pulse lowgoing pulse lsh33-40 * lsh33-30 lsh33-20 * 30 20 15 12 9 7 12 9 7 123456789012345678901234 1 2345678901234567890123 4 1 2345678901234567890123 4 123456789012345678901234 *d iscontinued s peed g rade
08/16/2000Clds.33-o 6 special arithmetic functions devices incorporated lsh33 32-bit barrel shifter with registers 12345678901234567890123456789012123456 1 234567890123456789012345678901212345 6 1 234567890123456789012345678901212345 6 1 234567890123456789012345678901212345 6 1 234567890123456789012345678901212345 6 1 234567890123456789012345678901212345 6 1 234567890123456789012345678901212345 6 1 234567890123456789012345678901212345 6 1 234567890123456789012345678901212345 6 1 234567890123456789012345678901212345 6 1 234567890123456789012345678901212345 6 1 234567890123456789012345678901212345 6 1 234567890123456789012345678901212345 6 1 234567890123456789012345678901212345 6 1 234567890123456789012345678901212345 6 12345678901234567890123456789012123456 123456789012345678901234567890121234567890123456789012345678901212345678901234 1 2345678901234567890123456789012123456789012345678901234567890121234567890123 4 1 2345678901234567890123456789012123456789012345678901234567890121234567890123 4 1 2345678901234567890123456789012123456789012345678901234567890121234567890123 4 1 2345678901234567890123456789012123456789012345678901234567890121234567890123 4 1 2345678901234567890123456789012123456789012345678901234567890121234567890123 4 1 2345678901234567890123456789012123456789012345678901234567890121234567890123 4 1 2345678901234567890123456789012123456789012345678901234567890121234567890123 4 1 2345678901234567890123456789012123456789012345678901234567890121234567890123 4 1 2345678901234567890123456789012123456789012345678901234567890121234567890123 4 1 2345678901234567890123456789012123456789012345678901234567890121234567890123 4 1 2345678901234567890123456789012123456789012345678901234567890121234567890123 4 1 2345678901234567890123456789012123456789012345678901234567890121234567890123 4 1 2345678901234567890123456789012123456789012345678901234567890121234567890123 4 1 2345678901234567890123456789012123456789012345678901234567890121234567890123 4 1 2345678901234567890123456789012123456789012345678901234567890121234567890123 4 1 2345678901234567890123456789012123456789012345678901234567890121234567890123 4 1 2345678901234567890123456789012123456789012345678901234567890121234567890123 4 1 2345678901234567890123456789012123456789012345678901234567890121234567890123 4 1 2345678901234567890123456789012123456789012345678901234567890121234567890123 4 1 2345678901234567890123456789012123456789012345678901234567890121234567890123 4 1 2345678901234567890123456789012123456789012345678901234567890121234567890123 4 1 2345678901234567890123456789012123456789012345678901234567890121234567890123 4 1 2345678901234567890123456789012123456789012345678901234567890121234567890123 4 1 2345678901234567890123456789012123456789012345678901234567890121234567890123 4 1 2345678901234567890123456789012123456789012345678901234567890121234567890123 4 1 2345678901234567890123456789012123456789012345678901234567890121234567890123 4 123456789012345678901234567890121234567890123456789012345678901212345678901234 123456789012345678901234567890121234567890123456789012345678901212345678901234 1 2345678901234567890123456789012123456789012345678901234567890121234567890123 4 1 2345678901234567890123456789012123456789012345678901234567890121234567890123 4 1 2345678901234567890123456789012123456789012345678901234567890121234567890123 4 1 2345678901234567890123456789012123456789012345678901234567890121234567890123 4 1 2345678901234567890123456789012123456789012345678901234567890121234567890123 4 1 2345678901234567890123456789012123456789012345678901234567890121234567890123 4 1 2345678901234567890123456789012123456789012345678901234567890121234567890123 4 1 2345678901234567890123456789012123456789012345678901234567890121234567890123 4 1 2345678901234567890123456789012123456789012345678901234567890121234567890123 4 1 2345678901234567890123456789012123456789012345678901234567890121234567890123 4 1 2345678901234567890123456789012123456789012345678901234567890121234567890123 4 1 2345678901234567890123456789012123456789012345678901234567890121234567890123 4 1 2345678901234567890123456789012123456789012345678901234567890121234567890123 4 1 2345678901234567890123456789012123456789012345678901234567890121234567890123 4 1 2345678901234567890123456789012123456789012345678901234567890121234567890123 4 1 2345678901234567890123456789012123456789012345678901234567890121234567890123 4 1 2345678901234567890123456789012123456789012345678901234567890121234567890123 4 1 2345678901234567890123456789012123456789012345678901234567890121234567890123 4 1 2345678901234567890123456789012123456789012345678901234567890121234567890123 4 1 2345678901234567890123456789012123456789012345678901234567890121234567890123 4 1 2345678901234567890123456789012123456789012345678901234567890121234567890123 4 1 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2345678901234567890123456789012123456789012345678901234567890121234567890123 4 1 2345678901234567890123456789012123456789012345678901234567890121234567890123 4 1 2345678901234567890123456789012123456789012345678901234567890121234567890123 4 123456789012345678901234567890121234567890123456789012345678901212345678901234 1234567890123456789012345678901212345 1 23456789012345678901234567890121234 5 1 23456789012345678901234567890121234 5 1 23456789012345678901234567890121234 5 1 23456789012345678901234567890121234 5 1 23456789012345678901234567890121234 5 1 23456789012345678901234567890121234 5 1 23456789012345678901234567890121234 5 1 23456789012345678901234567890121234 5 1 23456789012345678901234567890121234 5 1 23456789012345678901234567890121234 5 1 23456789012345678901234567890121234 5 1234567890123456789012345678901212345 input i 31 -i 0 , sign si 4 -si 0 r/l, f/w eni, eno lsh33-50 * y 15 -y 0 so 4 -so 0 32 32 32 80 / 50 65 / 62 62 32 32 32 32 80 / 50 65 / 62 62 62 switching characteristics m ilitary o perating r ange (C55c to +125c) g uaranteed m aximum c ombinational d elays notes 9, 10 (ns) lsh33-40 * y 15 -y 0 so 4 -so 0 28 28 28 73 / 40 55 / 52 52 28 28 28 28 73 / 40 55 / 52 52 28 lsh33-30 * y 15 -y 0 so 4 -so 0 24 24 24 58 / 30 42 / 40 40 24 24 24 24 58 / 30 42 / 40 40 24 g uaranteed m inimum s etup and h old t imes w ith r espect to c lock r ising e dge notes 9, 10 (ns) lsh33-40 * fti = 0 fti = 1 setup hold setup hold 12 3 20 2 17 0 17 0 12 0 12 0 12 0 12 0 lsh33-30 * fti = 0 fti = 1 setup hold setup hold 10 0 15 2 15 0 15 0 10 0 10 0 10 0 10 0 lsh33-50 * fti = 0 fti = 1 setup hold setup hold 15 3 20 2 20 0 20 0 15 0 15 0 15 0 15 0 t ri -s tate e nable /d isable t imes notes 9, 10, 11 (ns) lsh33-50 * lsh33-40 * lsh33-30 * 22 20 17 22 20 17 t ena t dis c lock c ycle t ime and p ulse w idth notes 9, 10 (ns) minimum cycle time highgoing pulse lowgoing pulse lsh33-50 * lsh33-40 * lsh33-30 * 35 30 20 15 12 9 15 12 9 to output from input fti = 0, fto = 0 clk ms/ls fti = 0, fto= 1 clk (norm = 0/1) si 4 -si 0 r/l, f/w ms/ls fti = 1, fto = 0 clk ms/ls fti = 1, fto = 1 i 31 -i 0 , sign (norm = 0/1) si 4 -si 0 r/l, f/w ms/ls 123456789012345678901234 1 2345678901234567890123 4 1 2345678901234567890123 4 123456789012345678901234 *d iscontinued s peed g rade
devices incorporated special arithmetic functions 08/16/2000Clds.33-o 7 lsh33 32-bit barrel shifter with registers 1. maximum ratings indicate stress specifications only. functional oper- ation of these products at values beyond those indicated in the operating condi- tions table is not implied. exposure to maximum rating conditions for ex- tended periods may affect reliability. 2. the products described by this spec- ification include internal circuitry de- signed to protect the chip from damag- ing substrate injection currents and ac- cumulations of static charge. neverthe- less, conventional precautions should be observed during storage, handling, and use of these circuits in order to avoid exposure to excessive electrical stress values. 3. this device provides hard clamping of transient undershoot and overshoot. in- put levels below ground or above v cc will be clamped beginning at C0.6 v and v cc + 0.6 v. the device can withstand indefinite operation with inputs in the range of C0.5 v to +7.0 v. device opera- tion will not be adversely affected, how- ever, input current levels will be well in excess of 100 ma. 4. actual test conditions may vary from those designated but operation is guar- anteed as specified. 5. supply current for a given applica- tion can be accurately approximated by: where n = total number of device outputs c = capacitive load per output v = supply voltage f = clock frequency 6. tested with all outputs changing ev- ery cycle and no load, at a 5 mhz clock rate. 7. tested with all inputs within 0.1 v of v cc or ground, no load. 8. these parameters are guaranteed but not 100% tested. ncv f 4 2 notes 9. ac specifications are tested with input transition times less than 3 ns, output reference levels of 1.5 v (except t dis test), and input levels of nominally 0 to 3.0 v. output loading may be a resistive divider which provides for specified i oh and i ol at an output voltage of v oh min and v ol max respectively. alternatively, a diode bridge with upper and lower current sources of i oh and i ol respectively, and a balancing voltage of 1.5 v may be used. parasitic capacitance is 30 pf minimum, and may be distributed. this device has high-speed outputs ca- pable of large instantaneous current pulses and fast turn-on/turn-off times. as a result, care must be exercised in the testing of this device. the following measures are recommended: a. a 0.1 f ceramic capacitor should be installed between v cc and ground leads as close to the device under test (dut) as possible. similar capacitors should be installed between device v cc and the tester common, and device ground and tester common. b. ground and v cc supply planes must be brought directly to the dut socket or contactor fingers. c. input voltages should be adjusted to compensate for inductive ground and v cc noise to maintain required dut input levels relative to the dut ground pin. 10. each parameter is shown as a min- imum or maximum value. input re- quirements are specified from the point of view of the external system driving the chip. setup time, for example, is specified as a minimum since the exter- nal system must supply at least that much time to meet the worst-case re- quirements of all parts. responses from the internal circuitry are specified from the point of view of the device. output delay, for example, is specified as a maximum since worst-case operation of any device always provides data within that time. 11. for the t ena test, the transition is measured to the 1.5 v crossing point with datasheet loads. for the t dis test, the transition is measured to the 200mv level from the measured steady-state output voltage with 10ma loads. the balancing volt- age, v th , is set at 3.5 v for z-to-0 and 0-to-z tests, and set at 0 v for z- to-1 and 1-to-z tests. 12. these parameters are only tested at the high temperature extreme, which is the worst case for leakage current. s1 i oh i ol v th c l dut oe 0.2 v t dis t ena 0.2 v 1.5 v 1.5 v 3.5v vth 1 z 0 z z 1 z 0 1.5 v 1.5 v 0v vth v ol * v oh * v ol * v oh * measured v ol with i oh = C10ma and i ol = 10ma measured v oh with i oh = C10ma and i ol = 10ma f igure b. t hreshold l evels f igure a. o utput l oading c ircuit
08/16/2000Clds.33-o 8 special arithmetic functions devices incorporated lsh33 32-bit barrel shifter with registers 1234567890123456789012345678901212345678901234567 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1 23456789012345678901234567890121234567890123456 7 1234567890123456789012345678901212345678901234567 68-pin ordering information 68-pin 0c to +70c c ommercial s creening plastic j-lead chip carrier (j2) LSH33JC30 speed 30 ns ceramic pin grid array (g1) C55c to +125c mil-std-883 c ompliant C55c to +125c c ommercial s creening a b c d e f g h j k l top view through package (i.e., component side pinout) 12345 6 7 8 9 10 11 i 29 i 30 sign si/o 3 si/o 1 norm eni eno r/l y 30/14 y 29/13 i 28 i 27 y 28/12 y 27/11 i 26 i 25 y 26/10 y 25/9 i 24 i 23 y 24/8 y 23/7 i 22 i 21 y 22/6 y 21/5 i 20 i 19 y 20/4 y 19/3 i 18 i 17 y 18/2 y 17/1 i 16 i 15 y 16/0 oe i 14 gnd i 12 i 10 i 8 i 6 i 4 i 2 i 0 v cc ms/ls i 31 si/o 4 si/o 2 si/o 0 clk fti fto f/w y 31/15 gnd i 13 i 11 i 9 i 7 i 5 i 3 i 1 v cc 67 68 64 65 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 3 top view 466 63 62 1 2 27 32 33 34 35 36 37 38 61 39 40 9 41 42 43 5 86 7 28 29 30 31 gnd i 13 i 12 i 11 i 10 i 9 i 8 i 7 i 6 i 5 i 4 i 3 i 2 i 1 i 0 v cc v cc i 30 i 31 sign si/o 4 si/o 3 si/o 2 si/o 1 si/o 0 norm clk eni fti eno fto r/l f/w y 31/15 i 29 i 28 i 27 i 26 i 25 i 24 i 23 i 22 i 21 i 20 i 19 i 18 i 17 i 16 i 15 i 14 gnd y 30/14 y 29/13 y 28/12 y 27/11 y 26/10 y 25/9 y 24/8 y 23/7 y 22/6 y 21/5 y 20/4 y 19/3 y 18/2 y 17/1 y 16/0 oe ms/ls discontinued package


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